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I2C0/I2C1 inherit the module open-drain values.","reason":"not_in_source"},"vil":{"note":"Same as vih: no TXB0108 thresholds in SP-11324-001; only the four I2C pins inherit module values.","reason":"not_in_source"},"voh":{"note":"No output-high level is published for the TXB0108-buffered header pins; I2C pins inherit module values.","reason":"not_in_source"},"vol":{"note":"No output-low level is published for the TXB0108-buffered header pins; I2C pins inherit module values.","reason":"not_in_source"},"holes":{"note":"Figures 4-1/4-2 dimension the outline and heights only; no mounting-hole positions or diameters are published in SP-11324-001 v1.1 or the public NVIDIA user guide.","reason":"not_in_source"},"pull_up":{"note":"Only I2C0 (1.5 kΩ) and I2C1 (2.2 kΩ) have published pull-ups; Table 3-3 lists power-on pd/pu/z states but no resistance for other pins.","reason":"not_in_source"},"flash_kb":{"note":"No on-board flash storage; boots from microSD or external NVMe (Table on the NVIDIA spec page).","reason":"not_applicable"},"wireless":{"note":"No built-in radio; an M.2 Key E slot (J10) takes a Wi-Fi/Bluetooth card.","reason":"not_applicable"},"pull_down":{"note":"Table 3-3 lists power-on pull-down states (pd) but no resistance values.","reason":"not_in_source"},"compliance":{"note":"Neither the carrier board spec nor the product page lists certifications.","reason":"not_in_source"},"abs_max_voltage":{"note":"The carrier spec states 3.3 V header levels but no absolute maximum for the TXB0108-buffered pins; I2C pins inherit the module 3.63 V open-drain limit.","reason":"not_in_source"},"five_volt_tolerant":{"note":"No 5 V tolerance statement for the buffered header pins; I2C pins inherit module abs max 3.63 V (not 5 V tolerant).","reason":"not_in_source"}},"assembly_label":"Development board","assembly_level":3,"search_aliases":["Jetson Orin Nano Super Developer Kit","Jetson Orin Nano Super","Orin Nano Super dev kit","Jetson Orin Nano Developer Kit","DEV-22098"],"children_summary":[{"id":"78c54e2c-c5e7-5236-967b-cca663cae604--mcu","part_number":"Jetson Orin Nano 8GB","manufacturer":"NVIDIA","role":"main_processor","architecture":"six-core Arm Cortex-A78AE (64-bit)","clock_mhz":1700,"memory":{"other":{"rom_kb":null}}}],"design":{"assets":[{"other":{},"kind":"datasheet","url":"https://uelectronics.com/wp-content/uploads/2023/05/Jetson-Orin-Nano-DevKit-Carrier-Board-Specification.pdf","label":"Datasheet","verification":"manufacturer","notes":null,"resolved_url":"https://uelectronics.com/wp-content/uploads/2023/05/Jetson-Orin-Nano-DevKit-Carrier-Board-Specification.pdf"},{"other":{},"kind":"image","url":"https://www.nvidia.com/content/dam/en-zz/Solutions/autonomous-machines/embedded-systems/nano-super-developer-kit/jetson-orin-nano-super-developer-kit-og.jpg","label":"NVIDIA Jetson Orin Nano Super Developer Kit","verification":"manufacturer","notes":"inspected: Jetson Orin Nano developer kit carrier board with the module, black heatsink and fan, next to its retail box","resolved_url":"https://www.nvidia.com/content/dam/en-zz/Solutions/autonomous-machines/embedded-systems/nano-super-developer-kit/jetson-orin-nano-super-developer-kit-og.jpg"},{"other":{},"kind":"cad","url":"nvidia-jetson-orin-nano-super-dev-kit.step","label":"STEP (generated from datasheet drawing)","verification":"generated","notes":"cad_check passed","resolved_url":"https://wlrumvsjnliyuuvzwnrt.supabase.co/storage/v1/object/public/geometry/nvidia-jetson-orin-nano-super-dev-kit.step"}],"cad":{"verification":"generated","envelope_complete":true,"assumptions":[],"step_path":"nvidia-jetson-orin-nano-super-dev-kit.step","mesh_path":"nvidia-jetson-orin-nano-super-dev-kit.stl","footprint_svg_path":null,"bbox":{"length_mm":100,"width_mm":79,"height_mm":1.57},"features":[],"step_url":"https://wlrumvsjnliyuuvzwnrt.supabase.co/storage/v1/object/public/geometry/nvidia-jetson-orin-nano-super-dev-kit.step","mesh_url":"https://wlrumvsjnliyuuvzwnrt.supabase.co/storage/v1/object/public/geometry/nvidia-jetson-orin-nano-super-dev-kit.stl","footprint_svg_url":null},"limitations":["Generated geometry is an approximate mechanical envelope; inspect original manufacturer CAD when available.","Generated footprint_svg_path is an outline, not a verified electrical land pattern.","Xirkit does not run fit checks; download step_url and test fit against your own enclosure."]}}}