Seeed Studio XIAO nRF52840 Sense pinout
All 22 pins of the Seeed Studio XIAO nRF52840 Sense, each mapped to the nRF52840-QIAA pad it routes to, with its functions and — for 14 pins — the electrical limits from the chip datasheet. Every number cites its page and table.
22 pins documented14 with electrical limits13 gpio2 power in3 ground1 power out2 debug1 controlcomplete pinout
Pin table
Markdown · JSONSeeed Studio XIAO nRF52840 Sense pins, functions and electrical limits
| Pin | Position | Kind | Chip pad | Functions | VIH | VIL | VOH | VOL | IOH | IOL | 5 V tolerant | Abs max | Source |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| D0 | castellated_edge · L1 | gpio | P0.02 | D0, P0.02, PWM, Analog, AIN0, any digital peripheral via PSEL (UART/SPI/TWI/PWM/QDEC/I2S/PDM) | 2.31–3.3 V | 0–0.99 V | 2.9–3.3 V | 0–0.4 V | 1–4 mA | 1–4 mA | no | -0.3–3.6 V | nRF52840-QIAA datasheet p.159 |
| D1 | castellated_edge · L2 | gpio | P0.03 | D1, P0.03, PWM, Analog, AIN1, any digital peripheral via PSEL (UART/SPI/TWI/PWM/QDEC/I2S/PDM) | 2.31–3.3 V | 0–0.99 V | 2.9–3.3 V | 0–0.4 V | 1–4 mA | 1–4 mA | no | -0.3–3.6 V | nRF52840-QIAA datasheet p.159 |
| D2 | castellated_edge · L3 | gpio | P0.28 | D2, P0.28, PWM, Analog, AIN4, any digital peripheral via PSEL (UART/SPI/TWI/PWM/QDEC/I2S/PDM) | 2.31–3.3 V | 0–0.99 V | 2.9–3.3 V | 0–0.4 V | 1–4 mA | 1–4 mA | no | -0.3–3.6 V | nRF52840-QIAA datasheet p.159 |
| D3 | castellated_edge · L4 | gpio | P0.29 | D3, P0.29, PWM, Analog, AIN5, any digital peripheral via PSEL (UART/SPI/TWI/PWM/QDEC/I2S/PDM) | 2.31–3.3 V | 0–0.99 V | 2.9–3.3 V | 0–0.4 V | 1–4 mA | 1–4 mA | no | -0.3–3.6 V | nRF52840-QIAA datasheet p.159 |
| D4 | castellated_edge · L5 | gpio | P0.04 | D4, P0.04, PWM, Analog, SDA, AIN2, any digital peripheral via PSEL (UART/SPI/TWI/PWM/QDEC/I2S/PDM) | 2.31–3.3 V | 0–0.99 V | 2.9–3.3 V | 0–0.4 V | 1–4 mA | 1–4 mA | no | -0.3–3.6 V | nRF52840-QIAA datasheet p.159 |
| D5 | castellated_edge · L6 | gpio | P0.05 | D5, P0.05, PWM, Analog, SCL, AIN3, any digital peripheral via PSEL (UART/SPI/TWI/PWM/QDEC/I2S/PDM) | 2.31–3.3 V | 0–0.99 V | 2.9–3.3 V | 0–0.4 V | 1–4 mA | 1–4 mA | no | -0.3–3.6 V | nRF52840-QIAA datasheet p.159 |
| D6 | castellated_edge · L7 | gpio | P1.11 | D6, P1.11, PWM, TX, any digital peripheral via PSEL (UART/SPI/TWI/PWM/QDEC/I2S/PDM) | 2.31–3.3 V | 0–0.99 V | 2.9–3.3 V | 0–0.4 V | 1–4 mA | 1–4 mA | no | -0.3–3.6 V | nRF52840-QIAA datasheet p.159 |
| 5V | castellated_edge · R1 | power in | power_in | p.4 table 4_3 | |||||||||
| GND | castellated_edge · R2 | ground | ground | ||||||||||
| 3V3 | castellated_edge · R3 | power out | power_out | https://files.seeedstudio.com/wiki/XIAO-BLE/Res/260828_Seeed_Studio_XIAO_nRF52840_v1.2.zip | |||||||||
| D10 | castellated_edge · R4 | gpio | P1.15 | D10, P1.15, PWM, SPI_MOSI, any digital peripheral via PSEL (UART/SPI/TWI/PWM/QDEC/I2S/PDM) | 2.31–3.3 V | 0–0.99 V | 2.9–3.3 V | 0–0.4 V | 1–4 mA | 1–4 mA | no | -0.3–3.6 V | nRF52840-QIAA datasheet p.159 |
| D9 | castellated_edge · R5 | gpio | P1.14 | D9, P1.14, PWM, SPI_MISO, any digital peripheral via PSEL (UART/SPI/TWI/PWM/QDEC/I2S/PDM) | 2.31–3.3 V | 0–0.99 V | 2.9–3.3 V | 0–0.4 V | 1–4 mA | 1–4 mA | no | -0.3–3.6 V | nRF52840-QIAA datasheet p.159 |
| D8 | castellated_edge · R6 | gpio | P1.13 | D8, P1.13, PWM, SPI_SCK, any digital peripheral via PSEL (UART/SPI/TWI/PWM/QDEC/I2S/PDM) | 2.31–3.3 V | 0–0.99 V | 2.9–3.3 V | 0–0.4 V | 1–4 mA | 1–4 mA | no | -0.3–3.6 V | nRF52840-QIAA datasheet p.159 |
| D7 | castellated_edge · R7 | gpio | P1.12 | D7, P1.12, PWM, RX, any digital peripheral via PSEL (UART/SPI/TWI/PWM/QDEC/I2S/PDM) | 2.31–3.3 V | 0–0.99 V | 2.9–3.3 V | 0–0.4 V | 1–4 mA | 1–4 mA | no | -0.3–3.6 V | nRF52840-QIAA datasheet p.159 |
| NFC1 | back_pads · NFC2 | gpio | P0.09 | NFC1, P0.09, any digital peripheral via PSEL (UART/SPI/TWI/PWM/QDEC/I2S/PDM) | 2.31–3.3 V | 0–0.99 V | 2.9–3.3 V | 0–0.4 V | 1–4 mA | 1–4 mA | no | -0.3–3.6 V | nRF52840-QIAA datasheet p.159 |
| NFC2 | back_pads · NFC1 | gpio | P0.10 | NFC2, P0.10, any digital peripheral via PSEL (UART/SPI/TWI/PWM/QDEC/I2S/PDM) | 2.31–3.3 V | 0–0.99 V | 2.9–3.3 V | 0–0.4 V | 1–4 mA | 1–4 mA | no | -0.3–3.6 V | nRF52840-QIAA datasheet p.159 |
| SWDIO | back_pads · TP5 | debug | SWDIO | SWDIO | |||||||||
| SWDCLK | back_pads · TP3 | debug | SWDCLK | SWDCLK | |||||||||
| RESET | back_pads · TP2 | control | P0.18 | RESET, P0.18, nRESET, any digital peripheral via PSEL (UART/SPI/TWI/PWM/QDEC/I2S/PDM) | 2.31–3.3 V | 0–0.99 V | 2.9–3.3 V | 0–0.4 V | 1–4 mA | 1–4 mA | no | -0.3–3.6 V | nRF52840-QIAA datasheet p.159 |
| GND | back_pads · TP1 | ground | ground | ||||||||||
| BAT+ | back_pads · BAT0 | power in | power_in | p.9 | |||||||||
| BAT- | back_pads · GND0 | ground | ground |
Answers from the record
Seeed Studio XIAO nRF52840 Sense pinout FAQ
What microcontroller does the Seeed Studio XIAO nRF52840 Sense use?
The Seeed Studio XIAO nRF52840 Sense is built around the nRF52840-QIAA, alongside LSM6DS3TR-C, MSM261D3526H1CPM, BQ25101YFPT, SGM2040-3.3YUDH4G/TR.
How many GPIO pins does the Seeed Studio XIAO nRF52840 Sense have?
11 GPIO pins are exposed. Xirkit documents 22 board pins, 14 of them with pin-level electrical limits.
Are the Seeed Studio XIAO nRF52840 Sense I/O pins 5 V tolerant?
No. The I/O pins are not 5 V tolerant — they run at 3.3 V logic; use a level shifter for 5 V signals. Input-high threshold: 2.31–3.3 V.
How much current can a Seeed Studio XIAO nRF52840 Sense GPIO pin source?
Documented output-high current per pin: 1–4 mA. Values are traced to the chip datasheet; see the pinout table for per-pin limits and conditions.
What voltage powers the Seeed Studio XIAO nRF52840 Sense?
Supply range 5–5 V. Power inputs: 5V, BAT+.
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