Generic (unbranded)

ESP32-C6 SuperMini Dev Board

Name: ESP32-C6 SuperMini Dev Board
Brand: Generic (unbranded)
SKU: ESP32-C6 SuperMini

The ESP32-C6 SuperMini is a stamp-size generic board built on the ESP32-C6FH4. It has a 160 MHz RISC-V core plus an LP core, 4 MB flash, 512 KB + 16 KB SRAM, Wi-Fi 6, Bluetooth 5.3 LE and 802.15.4 for Zigbee / Thread. USB-C goes to native USB Serial/JTAG. It breaks out 22 GPIO (7 ADC) and has BOOT and RESET buttons, a WS2812 on GPIO8, an LED on GPIO15 and 3.3 V logic, for about $7.

ESP32-C6 SuperMiniDevelopment board

dev_boardwifibluetoothiotbeginner friendlyesp32-c6fh4microcontrollerdevelopment boardi2cspiuartusbsdioarduino ideesp-idfesphomeesp32-c6superminiwifi 6zigbeethreadmatter802.15.4risc-vusb-cws2812

Price$6.95ameridroid.com · in stock

Buy at ameridroid.com

Overview

Board essentials

Facts about the complete product. Unknown values remain open design questions.

Exposed GPIO: 22
Board I/O voltage: 3.3 V
Board flash capacity: 4 MiB
Board SRAM capacity: 512 KiB
Board operating range: -40 to 85 °C

A good fit for

Guidance to help you shortlist. The basis is shown for each recommendation.

Connected IoT devices and wireless sensor nodes

On-board radio: Wi-Fi 6 802.11ax 2.4 GHz; Bluetooth 5.3 LE.

Engineering inference

Learning and fast prototyping

Programs from Arduino IDE, ESP-IDF, ESPHome.

Engineering inference

Inside this board

The board is the parent product. Each chip has its own memory, pins, capabilities and thermal limits.

main processor

ESP32-C6FH4

Espressif Systems

0cc1e8eb-a478-58f5-a621-6f2108b4904a--mcu

Architecture: 32-bit RISC-V (HP) + 32-bit RISC-V LP coprocessor
Documented clock: 160 MHz
Chip / in-package flash: 4 MiB
On-chip SRAM: 512 KiB

Chip capabilities and thermal limits

Chip-level capabilities have not been documented.

Chip capabilities require suitable board wiring, supply and firmware. They do not establish which interfaces are exposed on this board.

3D model & CAD

3D model & CAD files

Generated from the datasheet's dimensioned drawing and measured against it. Download the STEP to check fit in your own enclosure.

Envelope (L × W × H): 25.56 × 18 × 1.6 mm
Verification: generated
Envelope complete: No — some heights assumed

STEP STL mesh

thickness=1.6 mm assumed: PCB thickness not printed; 1.6 mm assumed for the CAD envelope only

Pins & mapping

26 board pins and 22 explicit routes documented. The record marks the pinout complete. Alternate functions can share pins and may not be usable together.

Exposed board pins

Board connector positions are the physical points you wire to.

Exposed board pins
Board pin	Connector / position	Electrical	Functions / constraints
BATID BAT	—Position back pad beside USB-C (B+ / B−)	power in	power_in Lithium battery input for the onboard charger. NOT a header pin - it is a separate pad beside the USB connector, with BAT printed turned beside it. The right header's ten pads are 5V GND 3V3 20 19 18 15 14 9 8, each with its name printed just past it toward the antenna end, the same way the left row prints TX RX 0-7.
5VID 5V	—Position R1	power in	power_in 5V power input for the board
GNDID GND	—Position R2	0 Vground	ground Ground connection
3V3ID 3V3	—Position R3	power out	power_out 3.3V power output for peripherals
16ID 16	—Position L1	3.3 Vgpio5 V tolerant: noMax drive 28 mA	TX (UART0), GPIO16, U0TXD, FSPICS0 TX
17ID 17	—Position L2	3.3 Vgpio5 V tolerant: noMax drive 28 mA	RX (UART0), GPIO17, U0RXD, FSPICS1 RX
0ID 0	—Position L3	3.3 Vgpio5 V tolerant: noMax drive 28 mA	XTAL_32K_P, ADC1_CH0, GPIO0 GPIO, ADC pin
1ID 1	—Position L4	3.3 Vgpio5 V tolerant: noMax drive 28 mA	XTAL_32K_N, ADC1_CH1, GPIO1 GPIO, ADC pin
2ID 2	—Position L5	3.3 Vgpio5 V tolerant: noMax drive 28 mA	ADC1_CH2, GPIO2, FSPIQ GPIO, ADC pin
3ID 3	—Position L6	3.3 Vgpio5 V tolerant: noMax drive 28 mA	ADC1_CH3, GPIO3 GPIO, ADC pin
4ID 4	—Position L7	3.3 Vgpio5 V tolerant: noMax drive 28 mA	ADC1_CH4, GPIO4, MTMS, FSPIHD GPIO, ADC pin
5ID 5	—Position L8	3.3 Vgpio5 V tolerant: noMax drive 28 mA	ADC1_CH5, GPIO5, MTDI, FSPIWP GPIO, ADC pin
6ID 6	—Position L9	3.3 Vgpio5 V tolerant: noMax drive 28 mA	ADC1_CH6, GPIO6, MTCK, FSPICLK GPIO, ADC pin
7ID 7	—Position L10	3.3 Vgpio5 V tolerant: noMax drive 28 mA	GPIO7, MTDO, FSPID GPIO
8ID 8	—Position R10	3.3 Vgpio5 V tolerant: noMax drive 28 mA	onboard WS2812 RGB LED, GPIO8 GPIO, RGB LED
9ID 9	—Position R9	3.3 Vgpio5 V tolerant: noMax drive 28 mA	BOOT button (low at reset = download mode), GPIO9 GPIO, Boot
12ID 12	—Position inner pad	3.3 Vgpio5 V tolerant: noMax drive 28 mA	USB_D-, GPIO12 GPIO
13ID 13	—Position inner pad	3.3 Vgpio5 V tolerant: noMax drive 28 mA	USB_D+, GPIO13 GPIO
14ID 14	—Position R8	3.3 Vgpio5 V tolerant: noMax drive 28 mA	GPIO14 GPIO
15ID 15	—Position R7	3.3 Vgpio5 V tolerant: noMax drive 28 mA	status LED, GPIO15 GPIO, LED
18ID 18	—Position R6	3.3 Vgpio5 V tolerant: noMax drive 28 mA	GPIO18, SDIO_CMD, FSPICS2 GPIO
19ID 19	—Position R5	3.3 Vgpio5 V tolerant: noMax drive 28 mA	SCL (Mischianti default), GPIO19, SDIO_CLK, FSPICS3 GPIO
20ID 20	—Position R4	3.3 Vgpio5 V tolerant: noMax drive 28 mA	SDA (Mischianti default), GPIO20, SDIO_DATA0, FSPICS4 GPIO
21ID 21	—Position inner pad	3.3 Vgpio5 V tolerant: noMax drive 28 mA	GPIO21, SDIO_DATA1, FSPICS5 GPIO
22ID 22	—Position inner pad	3.3 Vgpio5 V tolerant: noMax drive 28 mA	GPIO22, SDIO_DATA2 GPIO
23ID 23	—Position inner pad	3.3 Vgpio5 V tolerant: noMax drive 28 mA	GPIO23, SDIO_DATA3 GPIO

Board → chip mapping

A board label, a chip signal ID and a package lead number are different identifiers.

Board to chip pin mappings
Board connection	Chip instance	Chip signal	Package lead	Route
`16`	ESP32-C6FH4Instance 0cc1e8eb-a478-58f5-a621-6f2108b4904a--mcu	GPIO16ID GPIO16	—	direct
`17`	ESP32-C6FH4Instance 0cc1e8eb-a478-58f5-a621-6f2108b4904a--mcu	GPIO17ID GPIO17	—	direct
`0`	ESP32-C6FH4Instance 0cc1e8eb-a478-58f5-a621-6f2108b4904a--mcu	GPIO0ID GPIO0	—	direct
`1`	ESP32-C6FH4Instance 0cc1e8eb-a478-58f5-a621-6f2108b4904a--mcu	GPIO1ID GPIO1	—	direct
`2`	ESP32-C6FH4Instance 0cc1e8eb-a478-58f5-a621-6f2108b4904a--mcu	GPIO2ID GPIO2	—	direct
`3`	ESP32-C6FH4Instance 0cc1e8eb-a478-58f5-a621-6f2108b4904a--mcu	GPIO3ID GPIO3	—	direct
`4`	ESP32-C6FH4Instance 0cc1e8eb-a478-58f5-a621-6f2108b4904a--mcu	GPIO4ID GPIO4	—	direct
`5`	ESP32-C6FH4Instance 0cc1e8eb-a478-58f5-a621-6f2108b4904a--mcu	GPIO5ID GPIO5	—	direct
`6`	ESP32-C6FH4Instance 0cc1e8eb-a478-58f5-a621-6f2108b4904a--mcu	GPIO6ID GPIO6	—	direct
`7`	ESP32-C6FH4Instance 0cc1e8eb-a478-58f5-a621-6f2108b4904a--mcu	GPIO7ID GPIO7	—	direct
`8`	ESP32-C6FH4Instance 0cc1e8eb-a478-58f5-a621-6f2108b4904a--mcu	GPIO8ID GPIO8	—	direct
`9`	ESP32-C6FH4Instance 0cc1e8eb-a478-58f5-a621-6f2108b4904a--mcu	GPIO9ID GPIO9	—	direct
`12`	ESP32-C6FH4Instance 0cc1e8eb-a478-58f5-a621-6f2108b4904a--mcu	GPIO12ID GPIO12	—	direct
`13`	ESP32-C6FH4Instance 0cc1e8eb-a478-58f5-a621-6f2108b4904a--mcu	GPIO13ID GPIO13	—	direct
`14`	ESP32-C6FH4Instance 0cc1e8eb-a478-58f5-a621-6f2108b4904a--mcu	GPIO14ID GPIO14	—	direct
`15`	ESP32-C6FH4Instance 0cc1e8eb-a478-58f5-a621-6f2108b4904a--mcu	GPIO15ID GPIO15	—	direct
`18`	ESP32-C6FH4Instance 0cc1e8eb-a478-58f5-a621-6f2108b4904a--mcu	GPIO18ID GPIO18	—	direct
`19`	ESP32-C6FH4Instance 0cc1e8eb-a478-58f5-a621-6f2108b4904a--mcu	GPIO19ID GPIO19	—	direct
`20`	ESP32-C6FH4Instance 0cc1e8eb-a478-58f5-a621-6f2108b4904a--mcu	GPIO20ID GPIO20	—	direct
`21`	ESP32-C6FH4Instance 0cc1e8eb-a478-58f5-a621-6f2108b4904a--mcu	GPIO21ID GPIO21	—	direct
`22`	ESP32-C6FH4Instance 0cc1e8eb-a478-58f5-a621-6f2108b4904a--mcu	GPIO22ID GPIO22	—	direct
`23`	ESP32-C6FH4Instance 0cc1e8eb-a478-58f5-a621-6f2108b4904a--mcu	GPIO23ID GPIO23	—	direct

ESP32-C6FH4 · chip pins

Chip signals stay attached to their chip instance, including their package lead and board exposure.

Chip package pins have not been transcribed for this instance.

Specifications

Board electrical limits

Supply voltage and GPIO logic voltage describe different parts of the design.

I/O voltage: 3.3 V
Supply voltage range: 3.3 to 6 V
Logic high minimum: 2.475 V
Per-pin drive limit: 28 mA

Power input domains
Input	Voltage range	Connector	Notes
BAT	Unknown	—	Lithium battery input for the onboard charger. NOT a header pin - it is a separate pad beside the USB connector, with BAT printed turned beside it. The right header's ten pads are 5V GND 3V3 20 19 18 15 14 9 8, each with its name printed just past it toward the antenna end, the same way the left row prints TX RX 0-7.
5V	3.3 to 6 V	—	5V power input for the board

A 5 V supply input does not establish 5 V tolerance on GPIO. Check the documented power input and logic domain for each connection.

Board-level capabilities

These describe the assembled board. Interface counts do not guarantee simultaneous operation.

Board capabilities
Interface	Support	Count	Details
uart	Documented	Unknown	`16, 17`
gpio	Documented	Unknown	`16, 17, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 12, 13, 14, 15, 18, 19, 20, 21, 22, 23`
spi	Documented	Unknown	`16, 17, 2, 4, 5, 6, 7, 18, 19, 20, 21`
clock	Documented	Unknown	`0, 1`
adc	Documented	7	`0, 1, 2, 3, 4, 5, 6` count stated in datasheet (adc_channels)
jtag	Documented	Unknown	`4, 5, 6, 7`
led	Documented	Unknown	`8, 15`
control	Documented	Unknown	`9`
usb	Documented	Unknown	`12, 13`
sdio	Documented	Unknown	`18, 19, 20, 21, 22, 23`
i2c	Documented	Unknown	`19, 20`

Memory on the board

Board capacity includes installed memory; chip-local memory is listed separately under each processor.

Flash: 4 MiB
SRAM: 512 KiB

Capacities use KiB / MiB (1024-based units). Firmware partitions and runtime allocations reduce application-available memory.

Thermal limits by level

Product operating conditions, chip ambient ratings, package case limits and junction maxima remain separate.

Assembled board

Product operating range: -40 to 85 °C

ESP32-C6FH4 · main processor

Mechanical dimensions

Reported product dimensions may exclude protruding components. Unknown height does not establish a complete clearance envelope.

Length: 25.56 mm
Width: 18 mm

Attached generated geometry is an approximate envelope. A generated outline does not establish an electrically verified PCB footprint.

Board connectors

Connectors
ID / type	Pins	Pitch	Notes
usbUSB Type-C (power + native USB Serial/JTAG)	Unknown	Unknown	—
header2 × 10 castellated / through-hole edge pads at 2.54 mm pitch (TX RX 0–7 \| 5V GND 3V3 20 19 18 15 14 9 8), plus inner pads 12 13 21 22 23 and back BAT pads	26	2.54 mm	—

Software and certifications

Software frameworks: Arduino IDE, ESP-IDF, ESPHome

Complete structured record

Every available field, including details beyond the summaries. Null means the value has not been established.

Inspect product JSON

Sourcing & files

Supplier offers

US / USD is the target market. Observed price and stock are separate from a delivery quote.

ameridroid.com

US · USD

$6.95Minimum quantity unknown

Observed stock: in stock
Checked: Oct 18, 2026, 03:38 AM UTC
Delivery estimate: Not quoted

This observation is stale or has no verified check time. Recheck with the supplier.

Visit supplier

Delivery depends on quantity, postal code and shipping method. A dispatch statement such as “ship today” is not an arrival estimate.

Design files and references

Each source keeps its own verification status. Confirm the part revision and file contents before using it in a design.

datasheet

Datasheet

Manufacturer reference

image

ESP32-C6 SuperMini front and back with headers (Ameridroid)

Unverified reference

inspected: purple PCB, USB-C, BOOT and RST buttons, ESP32-C6 QFN, ceramic antenna 'C3' at the far end; edge pads TX RX 0–7 / 5V GND 3V3 20 19 18 15 14 9 8, inner pads 12 13 21 22 23, back B+ B− pads; retailer photo

cad

STEP (generated from datasheet drawing) — link unavailable

Generated asset

cad_check passed

Generated envelope geometry may also exist for this record. It does not replace manufacturer CAD or a verified electrical land pattern.

Source evidence

Document provenance, retrieval dates and the field groups supported by each source.

ESP32-C6 SuperMini Dev Board datasheet

Generic (unbranded)datasheetRetrieved Oct 18, 2026, 03:29 AM UTC

Supports: spec.constraints.electrical.io_voltage_v, spec.constraints.electrical.logic_high_min_v, spec.constraints.electrical.pin_drive_max_ma, spec.constraints.electrical.supply_voltage_max_v, spec.constraints.electrical.supply_voltage_min_v, spec.constraints.thermal.operating_temp_max_c, spec.constraints.thermal.operating_temp_min_c, spec.geometry.cad.assumptions, spec.geometry.cad.bbox.height_mm, spec.geometry.cad.bbox.length_mm, spec.geometry.cad.bbox.width_mm, spec.geometry.cad.envelope_complete, spec.geometry.cad.mesh_path, spec.geometry.cad.step_path, spec.geometry.cad.verification, spec.geometry.dimensions.length_mm, spec.geometry.dimensions.width_mm, spec.provides.capabilities, spec.provides.features, spec.provides.gpio_count, spec.provides.memory.flash_kb, spec.provides.memory.sram_kb, spec.provides.software_frameworks, spec.provides.wireless, spec.usage.connectors, spec.usage.pin_mappings, spec.usage.pinout, spec.usage.pinout_complete, spec.usage.requirements.power_inputs

sha256 6e9a22c4e0b9c88dce6ed236ed72b9544f6a508e768b242c856f0363bb0b9891

ameridroid.com listing

Publisher unknowndistributorRetrieved Oct 18, 2026, 03:38 AM UTC

Supports: offers

FAQ

ESP32-C6 SuperMini Dev Board questions

What microcontroller does the ESP32-C6 SuperMini Dev Board use?

The ESP32-C6 SuperMini Dev Board is built around the ESP32-C6FH4.

How many GPIO pins does the ESP32-C6 SuperMini Dev Board have?

22 GPIO pins are exposed. Xirkit documents 26 board pins, 22 of them with pin-level electrical limits.

Are the ESP32-C6 SuperMini Dev Board I/O pins 5 V tolerant?

No. The I/O pins are not 5 V tolerant — they run at 3.3 V logic; use a level shifter for 5 V signals. Input-high threshold: 2.475–3.6 V.

How much current can a ESP32-C6 SuperMini Dev Board GPIO pin source?

Documented output-high current per pin: 40 mA typ. Values are traced to the chip datasheet; see the pinout table for per-pin limits and conditions.

What voltage powers the ESP32-C6 SuperMini Dev Board?

Supply range 3.3–6 V. Power inputs: BAT, 5V (3.3–6 V).

How much does the ESP32-C6 SuperMini Dev Board cost?

From $6.95 at ameridroid.com. Prices are observed unit prices before tax and shipping.

What are the ESP32-C6 SuperMini Dev Board dimensions?

25.56 × 18 mm. A STEP model is available for enclosure fit checks.

Which interfaces does the ESP32-C6 SuperMini Dev Board support?

uart, gpio, spi, clock, adc, jtag, led, control, usb, sdio, i2c.

How do I program the ESP32-C6 SuperMini Dev Board?

Supported frameworks: Arduino IDE, ESP-IDF, ESPHome.

Where does this ESP32-C6 SuperMini Dev Board data come from?

Every value in this record is traced to a source — 2 documents including the board and chip datasheets — with the page and table cited per value. Unknowns are left explicit, never guessed.

Sources

Full pinout table

ESP32-C6 SuperMini Dev Board datasheet — Generic (unbranded)
ameridroid.com listing

Also as JSON · Markdown